TI unveils next-generation 3-A DDR termination regulatorLinear regulator supports DDR3 power requirements for low-power-mode memory termination DALLAS (Aug. 4, 2008) – Texas Instruments Incorporated ...
Designed for DDR/DDR2 memory applications, the SC486 regulator combines a switching regulator and linear regulator in a 24-pin MLPQ package. Features include an input range of 2.5 to 25 V, a 1% ...
Diodes Incorporated has introduced a low-dropout linear regulator capable of generating the bus termination voltages needed by DDR 2, 3, 3L and 4 SDRAM memory systems. Diodes Incorporated has ...
Champion Microelectronic launched CM8500 3A bus termination regulators for DDR SDRAM memory systems last September and originally did not expect demand to rise significantly until the third quarter of ...
Essentially designed to handle the termination requirements of DDR memory arrays, the FAN6555 switching regulator employs high-efficiency MOSFETs that can endure source and sink currents up to 2A ...